1. Field of the Invention
The present invention relates to a method for forming micro contacts of a semiconductor device, and more particularly to a method for forming micro contacts having a dimension smaller than that of an actual dimension of the contact mask.
2. Description of the Prior Art
Recent high integration trend of semiconductor devices inevitably involves a reduction in unit cell area. For this reason, it has become important to provide techniques for obtaining a process margin.
Using existing techniques and equipment, however, it is difficult to fabricate semiconductor devices with a high integration degree because the techniques and equipment provide an insufficient process margin.
A conventional method for forming contacts of semiconductor devices will now be described.
In accordance with this method, a polysilicon film, which is a conductive layer for a gate electrode, is formed over a semiconductor substrate overlaid with a gate oxide film. Impurity ions are then implanted in the polysilicon film. Using a gate electrode mask, the polysilicon film and gate oxide film are then etched, thereby forming a gate electrode. Thereafter, impurity ions are implanted in the semiconductor substrate under the condition that the gate electrode is used as a mask, thereby defining source/drain junction regions. Over the resulting structure, an insulating layer is formed which provides a planarized surface. Using a contact mask, a photoresist film pattern is formed on a portion of the insulating film corresponding to the active region of the semiconductor substrate. Using the photoresist film pattern as a mask, the insulating film is partially etched, thereby forming a contact hole through which the semiconductor substrate is exposed at its desired portion. Thereafter, another conductive layer is formed on the resulting structure such that it comes into contact with the semiconductor substrate through the contact hole. Thus, a contact is formed.
In accordance with this method, however, a short circuit may occur between the gate electrode and the conductive layer buried in the contact hole because the formation of the contact is achieved by using the contact mask designed in accordance with the least design rule. As a result, the reliability of the semiconductor device is degraded. In order to solve this problem, it is required to increase the distance between neighboring gate electrodes or to reduce the size of the contact mask for forming the contact. Where the distance between neighboring gate electrodes is increased, however, the semiconductor device becomes bulky. In this case, it is impossible to achieve the high integration of the semiconductor device. In the case of reducing the contact mask, it is difficult to obtain a desired pattern because of the limited resolution of the used equipment. In this case, the semiconductor device exhibits a degraded reliance. Furthermore, it is difficult to achieve the high integration of the semiconductor device.